Aging-Aware Design Methods for Reliable Analog Integrated Circuits using Operating Point-Dependent Degradation

The focus of this thesis is on the development and implementation of aging-aware design methods, which are suitable to satisfy current needs of analog circuit design. Based on the well known \gm/\ID sizing methodology, an innovative tool-assisted aging-aware design approach is proposed, which is able to estimate shifts in circuit characteristics using mostly hand calculation schemes. The developed concept of an operating point-dependent degradation leads to the definition of an aging-aware sensitivity, which is compared to currently available degradation simulation flows and proves to be efficient in the estimation of circuit degradation. Using the aging-aware sensitivity, several analog circuits are investigated and optimized towards higher reliability. Finally, results are presented for numerous target specifications

A Modular Analog Front-end for the Recording of Neural Spikes and Local Field Potentials within a Neural Measurement System

AbstractThe measurement of neural signals is mandatory for an extensive and detailed understanding of the cortex. A parallel recording of multiple recording channels and varying neural signal types is required in order to cover a high density of neural information. Therefore, analog front-ends are required which record signals from the micro-mechanical electrodes and preprocesses these data for a transmission out of the brain. This paper presents an analog front-end for the recording of local field potentials and neural spikes. A modular approach is applied that enables the integration within a complete system or the operation as a single compo- nent. The use of configurable recording channels provides the capability to adjust the channels, dependent on the signal type of interest. The proposed front-end has been fabricated in a 0.35μm-CMOS process, and performance values are demonstrated by measurements

Alterungsabhängige Entwurfsmethoden für zuverlässige analoge Schaltungen unter Verwendung von arbeitspunktabhängiger Degradation

The focus of this thesis is on the development and implementation of aging-aware design methods, which are suitable to satisfy current needs of analog circuit design. Based on the well known \gm/\ID sizing methodology, an innovative tool-assisted aging-aware design approach is proposed, which is able to estimate shifts in circuit characteristics using mostly hand calculation schemes. The developed concept of an operating point-dependent degradation leads to the definition of an aging-aware sensitivity, which is compared to currently available degradation simulation flows and proves to be efficient in the estimation of circuit degradation. Using the aging-aware sensitivity, several analog circuits are investigated and optimized towards higher reliability. Finally, results are presented for numerous target specifications